Show HN: Penguin-rtl – Verilog equivalence checking locally in the browserpenguin-rtl.arjunv.net2 points·by avnd·năm ngoái·0 comments
avnd·2 năm trước·discussThis was a blog I wrote last year while I was in college!I want to work on UART over GPIO next, and would love any feedback on my first post!Some resources on the topic I found helpful: - https://github.com/rust-embedded/rust-raspberrypi-OS-tutoria... - https://wiki.osdev.org/Raspberry_Pi_Bare_Bones_Rust - https://harmonicss.co.uk/rust/rust-on-a-raspberry-pi-part-1/ - https://www.rpi4os.com/
avnd·2 năm trước·discussThat’s a very ambitious project to say the least and I’ll bite! Please elaborateAlso, have you checked out the OpenROAD[1] project? It’s a pretty impressive open source RTL to GDSII flow.I went to their most recent meetup at DAC’24 and there’s a great community around the project.[1] https://theopenroadproject.org/
avnd·2 năm trước·discussI work at an FPGA company so anything FPGA-related would be cool :)To capture the most popular topics, you can grab the topics of the top N most attended academic conferences as a starting point
avnd·2 năm trước·discussCool! Have you considered tagging/sub-categorizing? That would be helpful to organize topics.I’ve often seen papers have a list of keywords somewhere on the first page that could be helpful for indexing
avnd·2 năm trước·discussThe open source tooling isn’t perfect but it’s growing fast! I work in this space and recommend checking out the OpenROAD[1] project, which has full synthesis and pnr for select FPGAs.[1] https://theopenroadproject.org/
https://ucsbarchlab.github.io/PyRTL/