Apple has not shipped an InFO-PoP with side-by-side integrated die yet. This is expected to be the first one, using RDLs for the die-to-die interconnect (so different than M-Ultra series that uses silicon bridges).
The terms to search for are fan-out wafer level packaging (FOWLP) and TSMC InFO. The chiplets come from different wafers and are reconstituted into a molded plastic wafer, allowing multiple die side-by-side. Then multiple layers of wires are built on top, terminating in a BGA.
Equipment for ion implantation already includes mini accelerators [1] [2]. The semiconductor equipment industry in general has many machines that feel like they came out of a physics lab into a semi fab. For example, plasma dry-etching or deep-reactive ion etching. EUV litho is just one of many very interesting problems--currently the bottleneck so it's talked about a lot.
You are absolutely correct that design costs swamp mask costs by far. For 7 nm, it costs more than $271 million for design alone (EDA, verification, synthesis, layout, sign-off, etc) [1], and that’s a cheaper one. Industry reports say $650-810 million for a big 5 nm chip.
Keep in mind, a semiconductor fab has hundreds of other machines and equipment involved, and US companies are some of the biggest suppliers (Applied Materials, Lam Research, KLA-Tencor--all multi-billion dollar companies).
Lithography is definitely key, but all the equipment and process must work together.
The ASML lithography machine is just one, very important, machine out of many dozens.
A semiconductor fab process involves 100s-1000s of process steps each with dozens to hundreds of parameters.
For example, something as simple as rinsing a wafer after an etch step:
- How long to rinse
- What to rinse with (DI water, solvent, etc)
- What temperature to rinse at
- Should the temperature change over time?
- Agitated vs. non-agitated
It may sound small, but a bad rinse process will tank yields and make the whole process fail.
In a huge semiconductor company like Intel or TSMC, multiple process engineers specialize on each one of these steps out of hundreds. These are truly massive undertakings.
I actually have to disagree. I think it really depends on who you follow. For a long time I didn't use twitter at all, but I've recently become active.
The hardware hacker community (think Hackaday types) on Twitter is pretty awesome and a lot of fun to follow.
Stuff like the below comes through all the time, and the discussions with people making things are great.
Yeah! Embedded Rust on STM32* right now is pretty good! A lot of consolidation has happened in the device crates and HAL crates recently, so I'm adjusting a bit. But, it's looking good.
I'm actually working on a post about restarting my firmware using the latest and greatest (I started working on this firmware over a year ago).
I used the RFTM real-time OS (RTOS) because it's super light-weight and handy for checking at compile time that my interrupt handlers don't cause conflicts. It's really a nice framework for any event-based firmware (a big chunk).
I had it fabricated for me by a company by Front Panel Express. In a DIY audiophile forum I saw people using them, and if they're good enough for audiophile gear, probably good enough for me :P
Yeah, Rust is great! I've used it on several production projects for work, but not for extensive embedded work before this. Embedded Rust is getting better and better!
To be honest, I really don't know a good KiCad tutorial. I kind of just banged myself against it until I learned. But, I had previous experience with Eagle, Altium, and Cadence Allegro.
On a dev-board prototype before, I had also used Buildroot (https://buildroot.org) to create the minimal root filesystem image. This time around, I decided to use Debian since it makes installing packages I want much easier. For example, I can just apt-get install the USB wifi firmware packages instead of hunting them down and including in a manually generated image. It's still using a custom compiled kernel though, since I have custom drivers for things like the graphics hardware.
I'm trying to use Rust for as much as possible (I like Rust a lot). The STM32L0 runs rust, I bodged together a framebuffer driver in Rust, and the games in userspace are also in Rust. I'll post about the Rust framebuffer driver at some point.
The ZipCPU tutorials section is also great! They include verilog, using verilator (for simulation), and formal verification. And, personally, I think learning formal verification early is great, since it will probably be used more and more.
It's verilog, but you're going to have to learn some anyway. All of the new-generation HDLs compile down to verilog, which then goes into the various synthesis tools.
I've seen a split. Some people are looking for CPU acceleration. Others say Zynq effectively covers the case where FPGA designs include a soft-core anyway for high-level control, so why not make it a hard block.