Is there any interest in a "hardware" DCPU-16?
4 comments
There's already one!
https://github.com/sybreon/dcpu16
The core is written entirely in synthesisable Verilog RTL. Synthesises to about 700+ Slices at around 150MHz on a Spartan6. (minus h/w division and modulo)
Feel free to extend/expand/contribute.
I posted it on HN yesterday. http://news.ycombinator.com/item?id=3821400
The core is written entirely in synthesisable Verilog RTL. Synthesises to about 700+ Slices at around 150MHz on a Spartan6. (minus h/w division and modulo)
Feel free to extend/expand/contribute.
I posted it on HN yesterday. http://news.ycombinator.com/item?id=3821400
Neat! I'll check it out tonight. HW division and mod are going to be difficult-ish: I was thinking that either I could use a DSP block or, failing that, bump up the clock frequency of the LUTs used for div/mod until the 16div16 operation can appear to occur in 3 main CPU cycles. I'd love to contribute whatever I can to the project - I mostly work with Lattice stuff but I guess it couldn't hurt to give Xilinx's tools a try^^ Thanks!
Multi-cycle operations can actually be inserted into the pipeline. The `ena` signal would just need to be held low during that time.
There is also a VHDL implementation that was just released: https://github.com/isuru-c-p/DCPU16-VHDL
What would you interface to? I thought the idea of DCPU is that it runs the "ship" in 0x10c.
Why not learn real assembly on a living microprocessor and hook it up to real things? There are some instruction sets, like 6809/68000 or 8051, that are very easy to learn and are a good stepping stone to larger architectures.
I'm a big 6809 fan, and you can synthesize a whole '09 system from opencores.org: http://opencores.org/project,system09
Why not learn real assembly on a living microprocessor and hook it up to real things? There are some instruction sets, like 6809/68000 or 8051, that are very easy to learn and are a good stepping stone to larger architectures.
I'm a big 6809 fan, and you can synthesize a whole '09 system from opencores.org: http://opencores.org/project,system09
There's also been an instruction set/specification released for it (http://www.0x10c.com/doc/dcpu-16.txt). And while yes, within the game the DCPU's main function is to run the ship, you'll note that Notch makes reference to playing games "while you're waiting for X to finish" any number of times. People are already getting interested in the possibility, and it seemed like a fun project for me. More than anything, I was curious whether anyone else was thinking along these lines.
Already done. https://github.com/sybreon/dcpu16
As someone who loves working with uC's, yes, as long as the cost is around the price of Arduino/Cortex M3 board. I've never done a FPGA project, and this is the kind of thing that would get me started working with them.
I'm not sure if HDMI would be on my must-have list though, a serial-USB and console/terminal would be more than adequate for me.
I'm not sure if HDMI would be on my must-have list though, a serial-USB and console/terminal would be more than adequate for me.
I would want to have it cost much less than an Arduino in a "DIP package." The basic logic can be implemented in a $10 FPGA, add on cost of boards and connectors and a voltage regulator and it should still be less than $20. The advantage here would be that the user would be completely free to create her own "computer mainboard" with whatever peripherals she chooses. I might also consider doing an all-in-one with common peripherals, and if I did, a CDC/UART type thing would be high on the list. HDMI is easy to implement in recent FPGAs (easier than composite/S-Video/RGB out) which is why I'd want to display video using HDMI.
Very cool, that's something I'd definitely be interested in.
I would be interested if it had a bunch of toggle switches and a few pushbuttons and some LEDs for programming; input and output.
I don't know if that loses compatibility with Notch's DCPU-16.
I don't know if that loses compatibility with Notch's DCPU-16.
There's been no "official" memory map released (I don't know if Notch has even thought that out yet), but people on the forums are working on that. There will be various peripheral controllers, add-ons, etc., and as time goes on a "standard deployment" of the computer system (not just the CPU) will likely fall into place.
tl;dr: It doesn't break compatibility 'cos there's no compatibility to be broken yet ^^
tl;dr: It doesn't break compatibility 'cos there's no compatibility to be broken yet ^^
I've been intently watching the development of Notch's 0x10^c, and more specifically the CPU that's emulated within the game. I suspect a number of other people feel similarly but it seems like this could be an "antidote" to what another poster described a few days ago, the apparent lack of "casual," "for-fun" programming as of late.
I work with FPGAs for a living, so of course when I saw the DCPU spec I thought "I wonder how many LUTs it would take to synthesize this." Unsurprisingly, in its present incarnation it really does not take too many and could easily be burnt into a tiny FPGA and deployed in a 48-pin DIP package (with necessary voltage regulators, caps, buffers etc on the same board).
So I'm curious - would this sort of thing be interesting to anyone except me? I'm thinking I would want to do the CPU, make sure it's user-updateable, then also develop a PPU/APU and memory mappers for a real "retro-computing" experience (I would want the PPU to output HDMI signals though... I'm not retro enough to want to feed it to a TV through an RF modulator^^)
What do you all think? Is this something that interests anyone else?