AzN1337c0d3r

4 mesi fadiscuss

Were you born after 2001? Did you remember those planes that flew into the buildings?

Private planes can do the same thing.

AzN1337c0d3r

4 mesi fadiscuss

What's new about this with the H2 chip?

My H1-chipped USB-C Airpods Max (OG) seem to switch seamlessly between my iphone, ipad, and macbook pro already.

AzN1337c0d3r

5 mesi fadiscuss

Maybe things have changed but the last time I looked at this, it was only max 96GB to the GPU. And it isn't dynamic in the sense you still have to tweak the kernel parameters, which require a reboot.

Apple has none of this.

AzN1337c0d3r

5 mesi fadiscuss

Most workstation class laptops (i.e. Lenovo P-series, Dell Precision) have 4 DIMM slots and you can get them with 256 GB (at least, before the current RAM shortages).

There's also the Ryzen AI Max+ 395 that has 128GB unified in laptop form factor.

Only Apple has the unique dynamic allocation though.

AzN1337c0d3r

5 mesi fadiscuss

Insurance is likely using that same data to adjust rates.

AzN1337c0d3r

5 mesi fadiscuss

Left-right concurrency control might be a good fit for this problem.

https://concurrencyfreaks.blogspot.com/2013/12/left-right-co...

AzN1337c0d3r

9 mesi fadiscuss

Bought by Broadcom, now implementing classic strategy of leveraging vendor lock-in to milk customers.

AzN1337c0d3r

10 mesi fadiscuss

There's almost never a death where there is a single factor, regardless of aviation or not. You can always decompose systems into various layers of abstractions and relationships. But software bugs are definitely a contributing cause.

AzN1337c0d3r

10 mesi fadiscuss

> If all the examples you can conjure are decades old

They're not ALL the examples I can conjure up. MCAS would probably be an example of a modern software bug that killed a bunch of people.

How about the 1991 failure of the Patriot missile to defend against a SCUD missile due to a software bug not accounting for clock drift, causing 28 lives lost?

Or the 2009 loss of Air France 447 where the software displayed all sorts of confusing information in what was an unreliable airspeed situation?

Old incidents are the most likely to be widely disseminated, which is why they're most likely to be discussed, but that doesn't mean that the discussion resolving around old events mean the situation isn't happening now.

AzN1337c0d3r

10 mesi fadiscuss

Not to be pedantic, but people have died from software programming bugs being a primary contributing factor. One example: Therac-25 (https://en.wikipedia.org/wiki/Therac-25)

AzN1337c0d3r

10 mesi fadiscuss

I would submit Google's TPUs are not GPUs.

Similarly, Tenstorrent seems to be building something that you could consider "better", at least insofar that the goal is to be open.

AzN1337c0d3r

10 mesi fadiscuss

> Back in the real world, no race team would agree that their cars should disintegrate after one race.

Wasn't F1 teams basically doing this by replacing their engines and transmissions until the rules introduced penalties for component swaps in 2014?

AzN1337c0d3r

anno scorsodiscuss

They don't just specify 12 smaller cables for nothing if 2 larger ones will do. There are concerns here with mechanical compatibility (12 wires have smaller allowable bend radius than 2 larger ones with the same ampacity).

AzN1337c0d3r

anno scorsodiscuss

They are not the exact same thing.

https://www.corsair.com/us/en/explorer/diy-builder/power-sup...

AzN1337c0d3r

anno scorsodiscuss

Actually, the keyboard mechanism that the M1 MacBook Pros got was from the 2019 16-inch Intel MacBook Pro (which was the first 16-inch MacBook Pro).

So the 2019 16-inch MacBook Pro and the 2020 13-inch MacBook Pros got non-butterfly keyboards.

AzN1337c0d3r

anno scorsodiscuss

Depends on the server. Probably not going to be cost effective. I get barely ~0.5 tokens/sec.

I have Dual E5-2699A v4 w/1.5 TB DDR4-2933 spread across 2 sockets.

The full Deepseek-R1 671B (~1.4 TB) with llama.cpp seems to have a in that local engines that run the LLMs don't do NUMA aware allocation, so cores will often have to pull the weights in from another socket's memory controllers through the inter-socket links (QPI/UPI/Hypertransport) and bottleneck there.

For my platform that's 2x QPI links @ ~39.2GB/s/link that get saturated.

I give it a prompt, go to work and check back on it at lunch and sometimes it's still going.

If you're going to want to achieve interactively I'd aim for 7-10 tokens/s, so realistically it means you'll run one of the 8b models on a GPU (~30 tokens/s) or maybe a 70b model on an M4 Max (~8 tokens/s).

AzN1337c0d3r

anno scorsodiscuss

Duplicate HN submission from over 7! years ago:

https://news.ycombinator.com/item?id=16119981

AzN1337c0d3r

anno scorsodiscuss

The original BitNet paper (https://arxiv.org/pdf/2310.11453)

  BitNet: Scaling 1-bit Transformers for Large Language Models

was actually binary (weights of -1 or 1),

but then in the follow-up paper they started using 1.58bit weights (https://arxiv.org/pdf/2402.17764)

  The Era of 1-bit LLMs: All Large Language Models are in 1.58 Bits

This seems to be first source of the confounding of "1-bit LLM" and ternary weights that I could find.

  In this work, we introduce a 1-bit LLM variant, namely BitNet b1.58, in which every single parameter (or weight) of the LLM is ternary {-1, 0, 1}.

AzN1337c0d3r

2 anni fadiscuss

It's worth noting this is laptop 4090 GPU which is more like in the range of desktop 4070 performance.

AzN1337c0d3r

2 anni fadiscuss

Windstream uses T3200 and T3260.

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