Move Over, Silicon, There’s a New Circuit in Town(viterbi.usc.edu)
viterbi.usc.edu
Move Over, Silicon, There’s a New Circuit in Town
http://viterbi.usc.edu/news/news/2014/june-17-2014.htm
3 comments
I hate the title. I used the original title since I couldn't
think of anything better. Suggestions?
"Large scale complementary macroelectronics using hybrid integration of carbon nanotubes and IGZO thin film transistors"
HN policy is to always use the original title, no matter how dreadfully sensationalist or inaccurate it is.
Actually, we're supposed to fix the really bad (misleading or linkbait) original
titles but without injecting our own opinions (i.e. editorializing).
http://ycombinator.com/newsguidelines.html
> "Otherwise please use the original title, unless it is misleading or linkbait."
http://ycombinator.com/newsguidelines.html
> "Otherwise please use the original title, unless it is misleading or linkbait."
Why is it important to have both n-type and p-type transistors in the same circuit, why not just use p type carbon nanotube transistors?
It has to do with small amounts of leakage current on the device level. If you just use 1 type of transistor (p or n -type) then when you change from on/off or off/on you will lose more current than if you use both types in your circuit. Sum this across billions of transistors and the equation starts to make sense.
Noise rejection is another important advantage of CMOS. I don't know enough about these materials to know whether it applies here or not.
Can you explain what the importance of this leakage is? Electricity costs 'power-wise' it makes sense but are there other reasons to want to avoid transistor leakage?
Disclaimer: Not a hardware guy but am utterly fascinated, ooh's and ahh's may spontaneously result.
Disclaimer: Not a hardware guy but am utterly fascinated, ooh's and ahh's may spontaneously result.
I'll speak to this a bit...
Transistor logical state, typically logical 1 or logical 0, is represented physically by positive and negative charges, respectively. Therefore, we can change the device logical output of 1 or 0 by changing the charge output as positive or negative.
However, to change the charge of a piece of metal from positive to negative (or neutral to negative... it doesn't matter because we're worried about relative change), you need to physically move electrons (charge) on or off the metal. This movement of charge is real 'work' if you're unable to fully recover the charge when the device changes state. This results in spent energy.
Leakage current is important to consider mainly for power and heat transfer. As we require devices to increase computing performance and decrease power consumption, it is important to use techniques that economically reduce power. As power consumption of a chip increases, the spent energy of a toggling transistor becomes heat that needs to be removed in order to ensure proper functionality (in the worst case, the chip burns itself up). Therefore, proper thermal simulation and validation must be made at the system level (depending on what type of designer you are).
Transistor logical state, typically logical 1 or logical 0, is represented physically by positive and negative charges, respectively. Therefore, we can change the device logical output of 1 or 0 by changing the charge output as positive or negative.
However, to change the charge of a piece of metal from positive to negative (or neutral to negative... it doesn't matter because we're worried about relative change), you need to physically move electrons (charge) on or off the metal. This movement of charge is real 'work' if you're unable to fully recover the charge when the device changes state. This results in spent energy.
Leakage current is important to consider mainly for power and heat transfer. As we require devices to increase computing performance and decrease power consumption, it is important to use techniques that economically reduce power. As power consumption of a chip increases, the spent energy of a toggling transistor becomes heat that needs to be removed in order to ensure proper functionality (in the worst case, the chip burns itself up). Therefore, proper thermal simulation and validation must be made at the system level (depending on what type of designer you are).
Dwolb's explanation isn't quite clear, and I tried to type an explanation as well, but the wiki page has a vastly better explanation as to the advantages of CMOS over NMOS.
http://en.wikipedia.org/wiki/NMOS_logic
http://en.wikipedia.org/wiki/NMOS_logic
> http://spectrum.ieee.org/tech-talk/semiconductors/devices/so...