TSMC 2nm Update: Two Fabs in Construction, One Awaiting Government Approval(anandtech.com)
anandtech.com
TSMC 2nm Update: Two Fabs in Construction, One Awaiting Government Approval
https://www.anandtech.com/show/21241/tsmc-2nm-update-two-fabs-in-construction-one-awaiting-government-approval
9 comments
Could you please elaborate for the general HN public what TSMC is doing and how they are advancing too fast while Intel (also AMD?) are "stagnated"? I am not talking about bashing Intel but it seems there is a lot to talk about TSMC from the science, engineering, and business execution perspectives. It seems like TSMC is playing a complete new game in the chip industry.
Engineering wise Intel was part of EUV LLC in the late 90s but sold off their portion later in the 2000s I believe. It was a public/private partnership to develop EUV lithography and is the reason the US is able to dictate EUV machines not go to China.
How is your answer connected with my question?
If you are interested in a lay view of the semi-conductor industry, I suggest the rabbit-hole of Asianometry's back catalog.
Trying to ELI5-style compress an answer to 'explain the chip industry' means you have to be very opinionated in a way that's uncomfortable, and the way the question was framed, part of the answer will sound wrong to you.
TL;DR: TSMC bet on a particular manufacturing method (EUV), and it paid off. The company that makes the machines for that method is absurdly backordered. Also, people way overrate how ahead TSMC was/is, there was a halycon moment where Apple went ARM on desktop _and_ had exclusivity on TSMC's best node improvement in years. People were doing Apple's to oranges, ascribing the improvements from the die shrink to Apple's genius / TSMC's manufacturing. For verification dig into Apple community's in-depth reaction to recent M3 release, you'll find the take is generally def. not worth the upgrade if you have M2.
TL;DR: TSMC bet on a particular manufacturing method (EUV), and it paid off. The company that makes the machines for that method is absurdly backordered. Also, people way overrate how ahead TSMC was/is, there was a halycon moment where Apple went ARM on desktop _and_ had exclusivity on TSMC's best node improvement in years. People were doing Apple's to oranges, ascribing the improvements from the die shrink to Apple's genius / TSMC's manufacturing. For verification dig into Apple community's in-depth reaction to recent M3 release, you'll find the take is generally def. not worth the upgrade if you have M2.
iPod also won because of an exclusive deal on harddrives made by Toshiba and others with the iPod mini. Not Jony Ive design or the wheel interface.
They did some of the engineering behind the fundamental tech but later dissociated from it, then later didn't invest in buying and integrating it (EUV machines) when it was on the verge of production and missed out. I believe their first in-house fabbed chips with EUV only released within the last month or so, Meteor Lake.
It takes ~3 years to stand up a fab and has only been 5-6 since EUV was proved out with first mass production.
It takes ~3 years to stand up a fab and has only been 5-6 since EUV was proved out with first mass production.
> Intel (also AMD?) are "stagnated"
Intel are catching up and will likely launch their 20A node before TSMC 2nm. Intel's 20A also includes gate all around and backside power delivery, so I don't think it's accurate to say Intel are 'stagnated' any more.
Intel are catching up and will likely launch their 20A node before TSMC 2nm. Intel's 20A also includes gate all around and backside power delivery, so I don't think it's accurate to say Intel are 'stagnated' any more.
According to Intel's schedule, yes. Intel's schedule has 20A coming in Q3 2024.
However, according to Intel's schedule, they've been at Intel 3 since Q3 2023 (and Intel 4 since Q3 2022). The first Intel 4 processors actually launched in December 2024, 17 months after Intel 4 on their roadmap. We've yet to see any Intel 3 processors. I'm not accusing Intel of lying. Their roadmap can be when they've achieved a milestone rather than having it at the scale to start shipping chips. To be realistic about Intel's roadmap, 20A processors are probably coming in December 2025 at the earliest. That is earlier than TSMC's 2nm with gate all around and backside power delivery, but then there's also the question of whether Intel will actually pull it off.
I do like that Intel is recommitted to its fab, but I'd also say that it's too soon for me to believe that Intel will overtake TSMC. Why? Intel 4 is behind TSMC's N5 process in transistor density and Intel has only shipped a single line of processors with it - and they've had to use TSMC's N5 and N6 for the graphics and IO tiles. Basically, Intel has started shipping Intel 4, but not for most of their processors - none of their desktop or datacenter processors are using it.
There is a possibility that Intel will pull it off and I agree that Intel isn't stagnating anymore, but I'm not sure I'd go as far as saying it's "likely" that Intel will overtake TSMC. Yes, TSMC is still struggling to get 3nm beyond Apple. Qualcomm's upcoming 2024 flagship chips are using TSMC N4P. But while Intel has been making progress way faster than it had for a decade, their progress hasn't been as stellar as their marketing of it. Intel 4 doesn't match 5nm transistor density, Intel 3 still seems to be a mystery, and Intel is shipping few Intel 4 processors. Does Intel 20A end up falling between TSMC's N4 and N3P? Does Intel ship one processor at very low volume with 20A in December 2025 and it's late 2026 or even 2027 before they've got all their processors there?
It just the kind of situation where there's a lot of nuance because it doesn't matter what a company has "achieved". It matters what parts you can buy and at what price. I can get Apple products with 3nm, but it looks like Android devices won't be getting 3nm until 2025. That's available, but not to most people. Even if Intel "achieves" 20A: at what volume, at what transistor density?
However, according to Intel's schedule, they've been at Intel 3 since Q3 2023 (and Intel 4 since Q3 2022). The first Intel 4 processors actually launched in December 2024, 17 months after Intel 4 on their roadmap. We've yet to see any Intel 3 processors. I'm not accusing Intel of lying. Their roadmap can be when they've achieved a milestone rather than having it at the scale to start shipping chips. To be realistic about Intel's roadmap, 20A processors are probably coming in December 2025 at the earliest. That is earlier than TSMC's 2nm with gate all around and backside power delivery, but then there's also the question of whether Intel will actually pull it off.
I do like that Intel is recommitted to its fab, but I'd also say that it's too soon for me to believe that Intel will overtake TSMC. Why? Intel 4 is behind TSMC's N5 process in transistor density and Intel has only shipped a single line of processors with it - and they've had to use TSMC's N5 and N6 for the graphics and IO tiles. Basically, Intel has started shipping Intel 4, but not for most of their processors - none of their desktop or datacenter processors are using it.
There is a possibility that Intel will pull it off and I agree that Intel isn't stagnating anymore, but I'm not sure I'd go as far as saying it's "likely" that Intel will overtake TSMC. Yes, TSMC is still struggling to get 3nm beyond Apple. Qualcomm's upcoming 2024 flagship chips are using TSMC N4P. But while Intel has been making progress way faster than it had for a decade, their progress hasn't been as stellar as their marketing of it. Intel 4 doesn't match 5nm transistor density, Intel 3 still seems to be a mystery, and Intel is shipping few Intel 4 processors. Does Intel 20A end up falling between TSMC's N4 and N3P? Does Intel ship one processor at very low volume with 20A in December 2025 and it's late 2026 or even 2027 before they've got all their processors there?
It just the kind of situation where there's a lot of nuance because it doesn't matter what a company has "achieved". It matters what parts you can buy and at what price. I can get Apple products with 3nm, but it looks like Android devices won't be getting 3nm until 2025. That's available, but not to most people. Even if Intel "achieves" 20A: at what volume, at what transistor density?
>The first Intel 4 processors actually launched in December 2024
I think you meant December 2023
I think you meant December 2023
> Could you please elaborate for the general HN public what TSMC is doing and how they are advancing too fast while Intel (also AMD?) are "stagnated"?
AMD hasn't stagnated, they've made some serious progress in the last years, and they've long ago gone fabless - they spun off GlobalFoundries in 2009, and mostly deal with TSMC. The biggest problem AMD has when compared to anything ARM is the instruction set - x86 carries a crapton of baggage with its 40-ish years of history and backwards compatibility, while ARM is relatively clean.
Intel stagnated because they messed up big with their node shrinking and for inner-political reasons couldn't say they go with TSMC as well so they were stuck with their old nodes.
AMD hasn't stagnated, they've made some serious progress in the last years, and they've long ago gone fabless - they spun off GlobalFoundries in 2009, and mostly deal with TSMC. The biggest problem AMD has when compared to anything ARM is the instruction set - x86 carries a crapton of baggage with its 40-ish years of history and backwards compatibility, while ARM is relatively clean.
Intel stagnated because they messed up big with their node shrinking and for inner-political reasons couldn't say they go with TSMC as well so they were stuck with their old nodes.
Completely ignorant of hardware here.
That's why, I guess, they're looking to standardize x86s.
That's why, I guess, they're looking to standardize x86s.
By "new game" you mean what they have been doing for 30 years?
TMSC went all in on new tech from ASML where Intel and Global Foundries said it was too expensive.
Intel in particular was finding ways to get older stuff to work for newer nodes but it also had drawbacks. And Intel had dividends to pay.
Now Intel is ordering the newest equipment, but hasn’t build up the experience with it. Yet.
Intel in particular was finding ways to get older stuff to work for newer nodes but it also had drawbacks. And Intel had dividends to pay.
Now Intel is ordering the newest equipment, but hasn’t build up the experience with it. Yet.
No, he means that it did not use to be like this. Not even a decade ago Globalfoundries and Intel had competitive, production-ready nodes (~14nm).
[deleted]
Intel plans to launch 20A(~2nm) by end of year or early next year.
Asked here recently:
https://news.ycombinator.com/item?id=35665076
https://news.ycombinator.com/item?id=35665076
Judging from questions like why dont Apple buy TSMC or built their own foundry I would guess a lot more context will be needed and it would be at least a few thousands words if not more.
But to put it short, and one point that is not pointed out enough. TSMC has always been the leading edge foundry for nearly all SemiConductor company apart from Intel and AMD. If you want the most advance third party foundry, you basically only have TSMC to choose from. That has been the case since at least 2008. ( Or arguably a lot longer ). So for pretty much everyone in the industry nothing much has changed. TSMC mapped out their roadmap, speak to a few key client on their needs and capacity, plan their investment and ROI accordingly. The only thing that had changed is that they somehow not only are the leading edge on Foundry services, but also leading in terms All Silicon producer, where Intel used to be the king. So one way to think about it, is that TSMC has been executing like clock work for the past 20+ years. While Intel has multiple minor slip and one major slip in terms of node process, and also completely missed out on Smartphone revolution which provided an additional 2 Billion+ consumer electronics market using silicon chips, and they didn't get to enjoy the amortization over those potential 2 Billions unit volume. Even if they did like the 200M Apple Modem order, they completely failed to plan the CAPEX and OPEX spending and capacity planning. Which was later confirmed Intel's CEO Bob Swan. ( Not his fault. It was all on Brian Krzanich ). So to answer your question. "how they are advancing too fast while Intel (also AMD?) are "stagnated"?"
It was't TSMC moving too fast. It was Intel completely fucked it up. I wrote a lot about how Intel should have done Foundry in 2011 and how they missed everything by 2014. But a lot of these were only obvious now. Some of my comments below from 2016 and 2020.
Edit: That doesn't mean I am negative on current Intel. I was so happy and cried when Pat Gelsinger got back to Intel as CEO. It is a tough battle. But if Pat dont make it work then I doubt anyone else could either.
Copying what I wrote in 2020 [1]
>Tl;DR, It is TSMC, not Apple.
I have been thinking starting a blog on the topic considering how often this question keeps popping up. From a very high level overview.
1. Apple is partnering with TSMC. TSMC is now the leader in leading edge semiconductor manufacturing. A title that used to belong to Intel.
2. TSMC is now a generation ahead of Intel, meaning those thermal efficiency you see comes from using a better node. Nothing much to do with ARM or x86.
3. Both ARM and TSMC has dramatically change the Industry, you can now buy Designs / Blueprints from ARM, ( Or any other IP vendors such as Img PowerVR ) and Fab ( meaning producing them ) them with a Foundry.
4. TSMC is a Pure Play Foundry, meaning the Foundry does not produce their own chip and sell in the market to compete with its customers. A Non Pure Play Example would be Samsung or Intel, where Samsung produce their own Mobile SoC Exynos, and Intel with their x86 Chip. If you were Qualcomm producing your chip in Samsung's Fab, you are directly competing with them.
5. Apple now has the volume, or economy of scale to produce CPU themselves. Apple makes more silicon in unit volume than Intel per year.
Another Comments I wrote in 2016 [2]
> These process, R&D, process optimization, materials science are all cover by their cost to TSMC / Samsung. Btw TSMC's 2016 Capex ( including R&D ) is now equal to Intel $9.5B. When you consider TSMC is Pure Play and Intel being IDM, this is very significant mile stone.
[1] https://news.ycombinator.com/item?id=23822834
[2] https://news.ycombinator.com/item?id=12947327
But to put it short, and one point that is not pointed out enough. TSMC has always been the leading edge foundry for nearly all SemiConductor company apart from Intel and AMD. If you want the most advance third party foundry, you basically only have TSMC to choose from. That has been the case since at least 2008. ( Or arguably a lot longer ). So for pretty much everyone in the industry nothing much has changed. TSMC mapped out their roadmap, speak to a few key client on their needs and capacity, plan their investment and ROI accordingly. The only thing that had changed is that they somehow not only are the leading edge on Foundry services, but also leading in terms All Silicon producer, where Intel used to be the king. So one way to think about it, is that TSMC has been executing like clock work for the past 20+ years. While Intel has multiple minor slip and one major slip in terms of node process, and also completely missed out on Smartphone revolution which provided an additional 2 Billion+ consumer electronics market using silicon chips, and they didn't get to enjoy the amortization over those potential 2 Billions unit volume. Even if they did like the 200M Apple Modem order, they completely failed to plan the CAPEX and OPEX spending and capacity planning. Which was later confirmed Intel's CEO Bob Swan. ( Not his fault. It was all on Brian Krzanich ). So to answer your question. "how they are advancing too fast while Intel (also AMD?) are "stagnated"?"
It was't TSMC moving too fast. It was Intel completely fucked it up. I wrote a lot about how Intel should have done Foundry in 2011 and how they missed everything by 2014. But a lot of these were only obvious now. Some of my comments below from 2016 and 2020.
Edit: That doesn't mean I am negative on current Intel. I was so happy and cried when Pat Gelsinger got back to Intel as CEO. It is a tough battle. But if Pat dont make it work then I doubt anyone else could either.
Copying what I wrote in 2020 [1]
>Tl;DR, It is TSMC, not Apple.
I have been thinking starting a blog on the topic considering how often this question keeps popping up. From a very high level overview.
1. Apple is partnering with TSMC. TSMC is now the leader in leading edge semiconductor manufacturing. A title that used to belong to Intel.
2. TSMC is now a generation ahead of Intel, meaning those thermal efficiency you see comes from using a better node. Nothing much to do with ARM or x86.
3. Both ARM and TSMC has dramatically change the Industry, you can now buy Designs / Blueprints from ARM, ( Or any other IP vendors such as Img PowerVR ) and Fab ( meaning producing them ) them with a Foundry.
4. TSMC is a Pure Play Foundry, meaning the Foundry does not produce their own chip and sell in the market to compete with its customers. A Non Pure Play Example would be Samsung or Intel, where Samsung produce their own Mobile SoC Exynos, and Intel with their x86 Chip. If you were Qualcomm producing your chip in Samsung's Fab, you are directly competing with them.
5. Apple now has the volume, or economy of scale to produce CPU themselves. Apple makes more silicon in unit volume than Intel per year.
Another Comments I wrote in 2016 [2]
> These process, R&D, process optimization, materials science are all cover by their cost to TSMC / Samsung. Btw TSMC's 2016 Capex ( including R&D ) is now equal to Intel $9.5B. When you consider TSMC is Pure Play and Intel being IDM, this is very significant mile stone.
[1] https://news.ycombinator.com/item?id=23822834
[2] https://news.ycombinator.com/item?id=12947327
Since nm are Now Marketing, unrelated to physical dimension, how consequential is this node shrink? It must have passed some threshold to justify new factories - what was it?
Marketing sure painted themselves into a corner on this one by counting backwards, they only have one generation left before things get weird. Will they use fractions or go negative?
Aren't there units smaller than nm?
Yep, and they used to be measured in microns. e.g. the Z80 used the 4 μm process node https://wikipedia.org/wiki/Zilog_Z80 1000nm = 1μm
Next smallest is picometers, 1000pm = 1nm
Next smallest is picometers, 1000pm = 1nm
Would it make a difference if it was physical dimension? Wouldn't you simply be asking the same question?
I have no inside information, but gate-all-around and backside power are both pretty big developments. If you remember the rise of finfet, gate-all-around will probably be a similar step up (maybe slightly smaller). My guess is backside power is the less impactful of the two, and a little less directly quantifiable, but for route-limited designs it should enable 10-20% higher density which reduces cost and improves performance. It may also deliver higher quality power supplies, which improves power efficiency and maximum clock frequency.
It's hard to directly answer "how consequential", but it seems like it could be as significant as the step to TSMC 16nm.
It's hard to directly answer "how consequential", but it seems like it could be as significant as the step to TSMC 16nm.
samstave(1)
"In July 2022, TSMC announced that its N2 process technology will feature backside power delivery and will offer 10–15% higher performance at iso power or 20–30% lower power at iso performance and over 20% higher transistor density compared to N3E"
https://en.m.wikipedia.org/wiki/2_nm_process
https://en.m.wikipedia.org/wiki/2_nm_process
> Since nm are Now Marketing, unrelated to physical dimension
That's not entirely true. They might not decrease the minimum gate length, but generally the improvements made when bumping down the "nm" number has been a similar improvement as what making the gate length smaller would have given. So I don't find the numbering as misleading as others think.
It's not like any of us a designing gate cell libraries (well, I have, a very basic one, but I'm guessing most here haven't), and actually care about the gate length.
Using the minimum gate length as a naming scheme was always been a proxy for things chip designers actually care about: logic density, timing, power, etc.
That's not entirely true. They might not decrease the minimum gate length, but generally the improvements made when bumping down the "nm" number has been a similar improvement as what making the gate length smaller would have given. So I don't find the numbering as misleading as others think.
It's not like any of us a designing gate cell libraries (well, I have, a very basic one, but I'm guessing most here haven't), and actually care about the gate length.
Using the minimum gate length as a naming scheme was always been a proxy for things chip designers actually care about: logic density, timing, power, etc.
As you said N2 seems to be some sort of major milestone... and why 3 fabs? Well, I would naively say that will help TSMC production capacity to avoid being "trusted" by a few vendors and let alternatives access state-of-art N2... finally risc-v powerful micro-archs with N2?
The headline here is verbatim from the story, but reads better as
"TSMC 2nm Update: Two Fabs in Construction, Third Awaiting Government Approval"
"TSMC 2nm Update: Two Fabs in Construction, Third Awaiting Government Approval"
"But if we look at the recent Q4 report it does seems HPC ( or likely AI ) has infinite appetite for wafer capacity."
Famous last words
Famous last words
Does anyone know of a good book on semiconductor physics and manufacturing that doesn't read like it was written in the 70s?
so, how many nanometers is 2nm?
For those unaware, "2nm" is marketing-speak. The actual physical dimensions are 45nm gate pitch and 20nm tightest metal pitch for 2nm.
https://en.wikipedia.org/wiki/2_nm_process
https://www.pcgamesn.com/amd/tsmc-7nm-5nm-and-3nm-are-just-n...
https://en.wikipedia.org/wiki/2_nm_process
https://www.pcgamesn.com/amd/tsmc-7nm-5nm-and-3nm-are-just-n...
Oh wow, so a 7 percent improvement, not 50 percent. I'd heard about the disparity, but didn't know it was that big.
If this isnt a joke, 2nm=2 nanometers.
If this isn't a joke, you are wrong. What a world we live in.
> Today, terms such as “2 nanometer” and “3 nanometer” are widely used as shorthand for each new generation of chip, rather than a semiconductor's actual physical dimensions.
Its almost as if we live in 1984 where newspeak goes un-noticed
> Today, terms such as “2 nanometer” and “3 nanometer” are widely used as shorthand for each new generation of chip, rather than a semiconductor's actual physical dimensions.
Its almost as if we live in 1984 where newspeak goes un-noticed
Oh! Do you mean how many actual nanometers a transistor made on a '2nm' process is?
What I mean is: WTF, no one cares how many nanometers it is... why lie about it either way, anyways?
I think that’s a popular sentiment, but we should all appreciate the person who answered your question as if it was good-faith, right? That’s a good instinct for somebody to have.
for sure... I didn't down-vote him unlike some other people... I can't down-vote on this account anyways (I actually up-voted him because I saw his comment had been shadow banned, which is another terrible practice... humans are messed up, I hope AI takes over, for the better or the worst)
[deleted]
Did ASML advance the technologies for this node?
Who reserved all the expected output I wonder.
Who reserved all the expected output I wonder.
I am surprised with the absence of Cerebrus style x64 or ARM or NVDA GPU chips on the leading nodes.
That must be something like 40-50 billion in investment.
Reminder that technology nodes (5nm, 2nm, etc.) refer to the smallest feature, not some dimension of the transistor channel. For reference, a silicon atom is 0.21nm.
They used to refer to the smallest features, but they haven't had any real meaning for a long time now. The names of the nodes don't correspond to any physical feature of the actual transistor anymore.
Who cares? It's not like most of us are designing logic gate cells for chips. The transistor dimensions are irrelevant to us.
I really don't understand why this keeps getting brought up. It's not even an interesting fact.
When the chip manufacturing industry started finding other ways to increase logic density, improve timing, reduce power consumption, etc, they just started bumping down the "nm" number to indicate the improved performance, in a similar way as reducing the transistor gate length would have done before. Simple as that.
I really don't understand why this keeps getting brought up. It's not even an interesting fact.
When the chip manufacturing industry started finding other ways to increase logic density, improve timing, reduce power consumption, etc, they just started bumping down the "nm" number to indicate the improved performance, in a similar way as reducing the transistor gate length would have done before. Simple as that.
We should really measure this based on density for some basic repeated structure, or something like that. Adder-density or something, haha.
What about the surface area of a basic ALU NAND gate and a basic DRAM cell?
This is the first time TSMC has done two large feature set in one node generation. TSMC's N2 will first use gate-all-around (GAA), with an improved N2P coming with BackSide Power Delivery Network (BSPDN).
As with any new large node features, capacity will be constrained, so instead of the usual one additional Fab online per year expansion in leading node, they are bringing online 3 in the space of 2 years. This is also discounting that we dont know the total Wafer output of each Fab. But if we look at the recent Q4 report it does seems HPC ( or likely AI ) has infinite appetite for wafer capacity. So I wont be surprised if it is indeed a substantial increase in wafer capacity on leading node.
We will know ( or we can infer it ) once they start doing 2nm revenue reporting. TSMC tends to be very transparent with these sort of things. Something I hope Intel IFS will copy as well.