Show HN: A nibble-oriented CPU in Verilog to build a scientific calculator
github.com119 pointsby gdevic42 comments
12'b0000_0000_001?: begin : instr_daas // DAA, DAS
if (flags[BF_BIT])
rx[0] <= rx[0] + (op_is_daa ? 4'd6 : 4'd10);
flags[CF_BIT] <= flags[BF_BIT];
state <= FETCH;
end : instr_daas