He was just ahead of its time in terms of grind and realism. I remember one of the first times gregtech was introduced to the mainstream was with the Mindcrack FTB modpack, most people hated it because they were used to being able to unlock ore doubling (with the ic2 macerator) within the first 20 minutes of a new world. He increased the difficulty by making the recipe need diamond cutting heads instead of a ton of iron. As you said he did this by modifying another mod's recipe (in this example ic2) which was frowned upon at the time.
In a sense, he created expert mode modpacks before they were a thing, where it is common and expected to modify recipes from multiple mods to make a more interconnected recipe chain.
No it doesn't, the time to first fix from cold start of modern GNSS receivers is in seconds (24s on the NEO M9N). Assisted GNSS using data from the internet reduces that to under 2 seconds (see https://content.u-blox.com/sites/default/files/NEO-M9N-00B_D...). Of course this can change based on the GNSS environment.
Even in the worst case the almanac (the data that is streamed at 50 bits/second) repeats every 12.5 minutes not hours.
Awesome project, re fpga implementation one option you might want to explore are used Bitcoin miner control boards if you want the best logic units/$ ratio. I've used the EBAZ4205 (zynq 7010) control boards with a cheap/generic FT2232HL dev board and it works great. Of course it's a bit more of a pain compared to a regular dev board
To add on to this overview, there are a new class of inverters in research called grid forming inverters which don't just follow the rest of the grid. One interesting technique is they can simulate the inertia of a traditional rotating machine/generator.
The end of life notification for these chips were issued in May of 2022, with final orders by December 2022 [1].
The chip itself from what I can see at a glance has unremarkable specs compared to newer ones (all of TI's offerings have better relative humidity accuracy), but of course needing to redo a PCB design and firmware is annoying.
Very interesting project, I'd be interested in seeing their system architecture in more depth and what tricks they used to bring the unit cost down.
Another radio telescope project I saw a while ago """misused""" low cost universal GNSS receivers ICs (MAX2769) as their RF frontend, which I found to be novel since these chips operate in a weird performance regime of low resolution (1- or 2-bit output) but very high sensitivity.
It would be good if this chip had good idle current comparable to other MCUs. I have used the ESP32S3 and it's idle current with the radio enabled, but not transmitting, is quite terrible.
My application needed both can bus and Bluetooth (though no wifi) so the S3 was one of the only options available. I'm sure the high current draw is because the wifi and ble share the same radio?
Our university rocket team uses openrocket extensively for doing fast design iterations early in the design phase. We have also used Rasaero II which is meant to be more rigorous above transonic speeds. We have an Ansys CFD too but that requires significantly more time to set up.
We still use openrocket on launch days to do pre launch sims, but we override some of the parameters based on the more rigorous simulations.
I would suggest using a more modern IMU, the MPU6050 has been long obsoleted both in cost and capability by newer IMUs. I used the ST LSM6DSOX in my rocket flight computers, for example it has a way better rate noise density of 110ug/Sqrt[Hz] at 16g fs compared to the awful 400 ug/Sqrt[Hz] of the MPU6050 and is cheaper than the MPU6050 on LCSC last time I bought some. If you go newer to the LSM6DSV you can get 60ug/Sqrt[Hz] but these aren't as cheap. There was an interesting Sony project which used a synchronized array of these consumer IMUs to achieve lower noise (apparently they became export controlled despite just fusing a bunch of consumer IMUs on one PCB!)
Nowadays you can even use the LSM6DSV320X which has both a low-g and high-g integrated which basically obsoletes the high-g ADXL375 and saves some space, but it's not quite at the price and supply reliability of the LSM6DSOX since it is less than a year old.
I regularly use Mathematica for working with symbolic expressions (for its DSolve and transfer function stuff) and it is way more maintainable and elegant to have fractions, symbols and powers rendered in math mode instead of having to deal with a text only representation. Are there any front ends (either custom or somehow extending jupyter) for this project which recreate this experience?
I've found a combination of circuitjs and a spice simulator to be quick for prototyping custom analog circuits (made mainly from discretes). Circuitjs https://www.falstad.com/circuit/circuitjs.html allows you to edit components live unlike spice simulators, but with the tradeoff of convergence issues for more complex circuits, so I use circuitjs as a playground then use LTspice as a rigorous simulator.
If it's a circuit made by composing multiple integrated circuits based on their application notes and not a custom analog design, I just use LTspice alone since you can just import the manufacturers spice behavioral model (assuming they didn't encrypt them...)
This is true, for example many stm32 series have a 96 bit unique id which is derived from the lot number, wafer id and position [1]. Even the low cost stm32g0b1 series I am using has them, but they are missing from some older series.