Very well-written bite-sized intro. I've always wondered how well JITs would do if they had access to a scratchpad RAM (kind of like many GPUs). It's a very different problem than with a register allocator but I feel it'd be more useful for a JIT since it probably knows more about the program structure than whatever LRU variant the cache algorithm is using.
Small, cheap, and high-volume eats the world, and it's hard to beat DRAM. For any silicon hacker, this is disruption-in-waiting: make DRAM compute. Doesn't matter how, just do it well. Whether it be naive CMOS sensor substitutes like this, Micron's Automata processor - http://www.micron.com/about/innovations/automata-processing - (their IEEE paper is surprisingly good), or whatever you find fit, once you hit volume production you've probably won. It's hard for standard logic processes to hit cost-parity with this beast.