FPGAs Ride HP’s Moonshot(eetimes.com)
eetimes.com
FPGAs Ride HP’s Moonshot
http://www.eetimes.com/document.asp?doc_id=1326707&_mc=RSS_EET_EDT
2 comments
"Its secret sauce is its Carte compiler that automatically turns users’ C-level code into FPGA-readable firmware, eliminating the need for often complex Verilog-level FPGA programming tools. The FPGA also lets users quickly change code as workloads shift."
This is the most ridiculous claim I have seen yet for FPGAs.
I've used FPGAs for a long time, and IMO they don't make sense at all for compute. They are for when you need ASIC like features but can't afford spinning one. Reconfiguration time is often several seconds. They burn 10x the power of an equivalent ASIC.
Some FPGAs support partial reconfiguration now, so you can do some interesting things with changing the logic at runtime. But it's still slow, and all of your logic has to be prepared ahead of time - "compilation" times for most FPGA tools are into the hours.