Homebrewed CPU Is a Beautiful Mess of Wires(wired.com)
wired.com
Homebrewed CPU Is a Beautiful Mess of Wires
http://www.wired.com/gadgetlab/2009/05/homebrewed-cpu/
14 comments
You know we have these things called FPGAs. That's where you can have fun with hardware hacking nowdays.
You can design whatever piece of hardware you want and still have it execute at a decent speed (say 50 MHz, vs. 2 GHz for a Pentium). But I can put millions of gates of logic.
An 8-bit CPU is maybe 5,000 gates at most. A decent 32-bit RISC processor is below 100,000 gates.
My previous employer builds machines filled with such FPGAs (http://eve-usa.com). On those, you can map really crazy stuff like real, modern processors. It's the ultimate sandbox for the hardware designer.
The only problem is that they tend to be a little bit pricey for amateurs (but I hear you can get boxes real cheap through university programs - lucky students).
You can design whatever piece of hardware you want and still have it execute at a decent speed (say 50 MHz, vs. 2 GHz for a Pentium). But I can put millions of gates of logic.
An 8-bit CPU is maybe 5,000 gates at most. A decent 32-bit RISC processor is below 100,000 gates.
My previous employer builds machines filled with such FPGAs (http://eve-usa.com). On those, you can map really crazy stuff like real, modern processors. It's the ultimate sandbox for the hardware designer.
The only problem is that they tend to be a little bit pricey for amateurs (but I hear you can get boxes real cheap through university programs - lucky students).
I don't think he was focusing on performance. Bill Buzbee, of homebrewcpu.com, built his the same way, with wire-wrapped TTLs. He did it because he wanted "touch the magic" of those early machines.
I imagine there is something very satisfying of individually wire-wrapping thousands of connections and dealing with the minutiae of a complicated electronic device that prototyping a FPGA just can't give you, especially for a pet hobby.
I imagine there is something very satisfying of individually wire-wrapping thousands of connections and dealing with the minutiae of a complicated electronic device that prototyping a FPGA just can't give you, especially for a pet hobby.
I think that's a bit like saying that there's no point in painting pictures when you could just use a camera...this is obviously a labor of love.
Incidentally, if you ever get to the Computer History Museum in San Jose, they have an original computer from the Apollo missions there...which is also a bunch of wrapped wires. Gave me quite a shiver to imagine 3 people trusting their life to that.
Incidentally, if you ever get to the Computer History Museum in San Jose, they have an original computer from the Apollo missions there...which is also a bunch of wrapped wires. Gave me quite a shiver to imagine 3 people trusting their life to that.
Sparkfun has a number of relatively inexpensive FPGA boards to use. I might get one if I finish some of my other things this summer.
http://www.sparkfun.com/commerce/advanced_search_result.php?...
My friend just submitted his proposal for PhD research on a new dielectric, Hafnium-oxide.
He and I were talking yesterday about the massive knowledge-base at Intel where they have a very tight grip on semiconductor technology. He was musing that if Intel suddenly went up in flames, our culture would take a step back about 40-50 years.
His point being that these new transistors (32nm and subsequently 28nm gate width) are so incredibly complex that few people understand exactly how they work and all the issues underlying.
Not sure where the industry is headed, but the limit is fast approaching.
He and I were talking yesterday about the massive knowledge-base at Intel where they have a very tight grip on semiconductor technology. He was musing that if Intel suddenly went up in flames, our culture would take a step back about 40-50 years.
His point being that these new transistors (32nm and subsequently 28nm gate width) are so incredibly complex that few people understand exactly how they work and all the issues underlying.
Not sure where the industry is headed, but the limit is fast approaching.
Well, it's not that bad. Intel, it's true, is way ahead on process technology right now (disclosure: my wife is a process engineer there, and I'm unashamedly biased). But let's be honest: AMD, IBM, TSMC et. al. are behind Intel, but they're maybe 1-2 years behind. An Intel catastrophe might be a disaster of lost science, but I think society as a whole could survive if it had to subsist on Phenoms and ARM11s.
> Not sure where the industry is headed, but the limit is fast approaching.
Those types of statements have a short half life in the semiconductor industry.
Those types of statements have a short half life in the semiconductor industry.
Past performance is not a good indicator of the future, especially when you're bumping into basic limit of atoms.
Exactly. I remember when 50nm was a big deal. Now its 28nm? That's absurd. How they make those interconnects is beyond me.
s/limit/singularity/
I did this in undergrad, though not a 6502 and using solders and sockets. Wire wrapping makes this far, far more difficult.
“Why did I do all this?” he says. “I don’t know. But it has been a lot of fun.”
Same thing everyone asked me, and I gave the same answer. Glad to see I'm not the only one.
“Why did I do all this?” he says. “I don’t know. But it has been a lot of fun.”
Same thing everyone asked me, and I gave the same answer. Glad to see I'm not the only one.
wire-wrapping is crochet for engineers.
I don't understand why you say that. I'm a good solderer - my field engineers let me do real work - and yet I find wire-wrapping (for some things) better. I guess your mileage really does vary.
he says it didnt really add to the development time though.. which suggests soldering would have made little difference for him :)
Awesome. As the complexity of the underlying technology increases, I've often wondered if this style of hacking won't move solely into software, and then into virtual worlds -- think a World of Warcraft-like environment, or a metaverse, Neal Stephenson style.
Not a very well-formed thought, but something I think about from time to time.
Not a very well-formed thought, but something I think about from time to time.
To some extent, hacks like CPU design have already moved into software, or at least HDL code (depends on your definition of "software", of course). Check out the selection of FPGA-usable projects on opencores.org for examples.
That said, I suspect there will always be a desire to make physical machines with our hands. Even decades after such a thing stopped being a practical tool, this still looks fun.
That said, I suspect there will always be a desire to make physical machines with our hands. Even decades after such a thing stopped being a practical tool, this still looks fun.
It seems that the complexity of the technology is already out of immediate reach for hardware hackers of this sort. This is an 8-bit cpu!
Well just build two and you got a 16-bit'er and so on. Bit size it really not much more than linear scaling.
Other things like pipe-lining are behind the complexity of modern cpus.
Two 8-bit cores != a 16-bit CPU.
By your math, every dual-core 64-bit Intel CPU would actually be a 128-bit processor, a quad-core would equate to a 256-bit system, and the Cell would be a very studly 1088-bit chip (64-bit PPE + 8x128-bit SPEs).
You appear to be confusing "linear" scaling with "exponential", which makes a serious difference.
By your math, every dual-core 64-bit Intel CPU would actually be a 128-bit processor, a quad-core would equate to a 256-bit system, and the Cell would be a very studly 1088-bit chip (64-bit PPE + 8x128-bit SPEs).
You appear to be confusing "linear" scaling with "exponential", which makes a serious difference.
It's in principle pretty simple to interconnect two n-bit CPUs and obtain one 2n-bit CPU.
The only element that scales above linear is the multiplier, and it's not even quadratic.
True, depending on what you mean by "bit". I'm not sure it is entirely trivial to interconnect the instruction-parsing parts, and memory operations might also be interesting. The ALU would be pretty simple, but you'd lose a lot of speed there (assuming something else didn't kill you first), as even if you have two CLA's (seems unlikely, given the additional complexity), you'd double the time it would take to stabilize the outputs.
My point is, that just characterizing a CPU by saying it's an n-bit architecture, doesn't say very much about the complexity of the real thing.
You should not fall prey to the (in other contexts appropriate) assumption that an increase of one bit inherently doubles complexity (confusing linear with exponential).
You should not fall prey to the (in other contexts appropriate) assumption that an increase of one bit inherently doubles complexity (confusing linear with exponential).
By your math, every dual-core 64-bit Intel CPU would actually be a 128-bit processor, a quad-core would equate to a 256-bit system, and the Cell would be a very studly 1088-bit chip (64-bit PPE + 8x128-bit SPEs).
That's why the Atari Jaguar is 64-bit. DO THE MATH.
That's why the Atari Jaguar is 64-bit. DO THE MATH.
People in the Bay Area should visit the Computer History Museum in Mountain View.
http://www.computerhistory.org/
They have an example of a computer used on board the Apollo missions that was entirely wirewrapped. The docent said that when they were done debugging they would then pot the whole thing.
http://www.computerhistory.org/
They have an example of a computer used on board the Apollo missions that was entirely wirewrapped. The docent said that when they were done debugging they would then pot the whole thing.
Quite cool.
Actually surface mount is not all that bad. I have some friends who use it on boards at home for fun.
And I would be surprised if there weren't vendors or other activity using surface mount at the Faire.
Actually surface mount is not all that bad. I have some friends who use it on boards at home for fun.
And I would be surprised if there weren't vendors or other activity using surface mount at the Faire.
i'm working with surface mount components for a project. def. not as bad as the article makes it out to be. just takes a steady hand, a decent soldering station (i've got a weller WES51, around $80), small tips, lots of flux, and a magnifying glass. getting the first component down took a while, but improvement (fast and clean connections) came quickly. now it's kind of fun.
If I had a hand that steady I would be a brain surgeon...
Better:
If I had a hand that steady I would still be a brain surgeon...
Better:
If I had a hand that steady I would still be a brain surgeon...
This is so cool to see! I'm looking forward to spending time in his blog to follow from start to finish.
I don't have the skill or knowledge to attempt a project like this, so I guess that means I have project envy at this point and will have to be voyeur. :)
This brings back lots of late 70's and early 80's memories.
I don't have the skill or knowledge to attempt a project like this, so I guess that means I have project envy at this point and will have to be voyeur. :)
This brings back lots of late 70's and early 80's memories.
kind of makes me want to sit down and take a swing at building one myself
Even better idea : write a CPU simulator! Just a while loop that reads assembler from a file and interprets it on a virtual CPU. I did this in Java a while ago, I reproduced a few Intel x86 ASM instructions. MOV, CMP and JMP are all you need for Turing completeness, if I recall correctly.
You could make up your own assembly language.
Next easy step : add a memory-mapped bitmap display to your virtual machine. Bochs watch out!
After that, write a compiler for your favourite language towards your assembler and watch it run on your CPU. Then a debugger. Then you would be more awesome than Zed Shaw.
You could make up your own assembly language.
Next easy step : add a memory-mapped bitmap display to your virtual machine. Bochs watch out!
After that, write a compiler for your favourite language towards your assembler and watch it run on your CPU. Then a debugger. Then you would be more awesome than Zed Shaw.
Or if you're more hardware inclined but don't feel up to spending the time and money needed to make a wire wrapped cpu, I'd recommend learning vhdl or verilog and designing a cpu in that. It's at the logical level rather than physical, but it will still let you get a feel for the factors that go into designing a processor, and it is easier to add in more advanced aspects to the design.
What I'd love to see is someone invent an assembly language that is reversible. Meaning that if you execute the code backward, you undo whatever the code was doing.
This way, the undo function of office becomes trivial to implement! (minus some IO issues)
This way, the undo function of office becomes trivial to implement! (minus some IO issues)
I've written a simulator for one (not of my own design):
http://www.accesscom.com/~darius/hacks/pisa.tar.gz
Even better idea : write a CPU simulator! Just a while loop that reads assembler
from a file and interprets it on a virtual CPU. I did this in Java a while ago,
I reproduced a few Intel x86 ASM instructions. MOV, CMP and JMP are all you need
for Turing completeness, if I recall correctly.
Actually, you only need one instruction for Turing completeness: http://en.wikipedia.org/wiki/One_instruction_set_computer
Once upon a time, I hacked a simulator and an assembler for the Pendulum chip. It was an interesting and fun project in a lot of ways, but fair warning: the example program that computes Fibonacci numbers, I think, is wrong, and correcting that loop was not difficult per se but it was sure mind bending.
Aren't you going to need somewhat to actually calculate things? NAND would do it.
already made a c-based simulator. would like to do some hands-on hardware work. good idea, though.
We also build one at engineering school (national university of Mexico), although 12 years ago it was a 4-bit CPU (from gates, a couple of ALU, some sequencer,...), I think now they build 8-bit CPUs. Did you guys build similar things?
Wow, the Tyranny of Numbers in action in modern times: http://en.wikipedia.org/wiki/Tyranny_of_numbers
Is this using transistors? Vacuum tubes? Or discrete IC's?
His blog says he's using 7400 series TTL ICs. Just one step up from transistors.
I'm waiting for the first one built with relays :-)
Why not a breadboard? Wire wrapping seems pretty tedious.
I wire-wrapped my first computer. It's not that tedious, it beats the hell out of soldering when you're doing your first design, and if you make a mistake it's easy to fix.
When I then made modifications I used red wire instead of blue. If it didn't work I knew which wires to replace. If it did I could either leave it and use yellow as the next red, or I could replace the wires. At a glance I could see the state of the build.
A good wire-wrapping tool, good flow with the circuit, I could put three wires every minute for an hour.
I may still have it somewhere ...
When I then made modifications I used red wire instead of blue. If it didn't work I knew which wires to replace. If it did I could either leave it and use yellow as the next red, or I could replace the wires. At a glance I could see the state of the build.
A good wire-wrapping tool, good flow with the circuit, I could put three wires every minute for an hour.
I may still have it somewhere ...
You could do the same things with a breadboard, without the tedious wrapping.
At UIUC, one of the assignments for a required course in the Computer Engineering department is to build a (simple) 4-bit processor. We only got a week to do it, so you can be damn sure we used a breadboard and had a system in place to debug the thousands of wires.
At UIUC, one of the assignments for a required course in the Computer Engineering department is to build a (simple) 4-bit processor. We only got a week to do it, so you can be damn sure we used a breadboard and had a system in place to debug the thousands of wires.
UIUC is the truth. If they require you to do a project like that in order to graduate, they have a good grasp on what a CE needs to understand. Wish I would have went there.
Just curious - have you done both? I have, and my preference falls to wire-wraping. I'd be interested to hear an alternative opinion from someone who's done both.
Wow... that's quite an achievement, I don't think I would even know where to start with building a CPU from scratch!
While I don't have the skill/time to take on a project like this I really loved the book 'Code' by Charles Petzold. It walks you through the design of a CPU starting from nothing.
There is also 'From NAND to Tetris in 12 steps', I haven't looked closely at that but from what I've heard it gives a similar level of detail.
There is also 'From NAND to Tetris in 12 steps', I haven't looked closely at that but from what I've heard it gives a similar level of detail.
It's somewhat simple. You just design the finite-state table and either use a ROM (microcode) or some sort of hardwired logic to implement it.
I'm glossing over a lot of stuff here, but a simple CPU is just that, simple.
I'm glossing over a lot of stuff here, but a simple CPU is just that, simple.
Get a bunch of the crew together and sit around the table wire wrapping while exchanging stores from the cube.
Bob: "Steve, can you pass me a blue 16AWG strand..."
Steve: "Sure thing, your 4-bit CPU is turning out quite nice.."
Bob: "Thanks Steve, that's a pretty nice thing to say coming from someone who just finished a 8-bit dual core"
[Rest of the Crew]: "Ahhhh...."